Hybrid Load-Value Predictors

Microprocessors are becoming faster at such a rapid pace that memory systems cannot keep up. As a result, the relative latency of load instructions grows constantly and already impedes processor pe rformance. Load value predictors alleviate this problem by allowing the CPU to speculatively continue processing without having to wait for load instructions to co mplete, which can significantly improve the execution speed. While several hybrid load value predictors have been proposed and found to work well, n o systematic study of such predictors has been performed to date. In this paper, we investigate the perfor mance of all hybrids that can be built out of a register value, a last value, a stride 2 -delta, a last four value, and a finite context method predic tor. Our analysis shows that hybrids can deliver 25% more speedup than the best single -component predictors. Analyzing the individual comp onents of hybrids revealed that predictors with a poor standalone performance sometimes make excellent components while combining well -performing individual predictors often does not result in an effe ctive hybrid. Moreover, adding components to a hybrid sometimes worsens the performance. Our hybridization study identified the register value + stride 2-delta predictor as one of the best twocomponent hybrids. It matches or exceeds the speedup of two-component hybrids from the literature in spite of its substantially smaller and simpler design. Of all the predictors we studied, the register value + stride 2 -delta + last four value hybrid performs best. It yields a harmonic -mean speedup over the eight SPECint95 programs of 13.6% to 17.2%.